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lt6202/lt6203/lt6204 1 620234fc typical a pplica t ion descrip t ion single/dual/quad 100mhz, rail-to-rail input and output, ultralow 1.9nv/ hz noise, low power op amps the ltc ? 6202/lt6203/lt6204 are single/dual/quad low noise, rail-to-rail input and output unity gain stable op amps that feature 1.9nv/ hz noise voltage and draw only 2.5ma of supply current per amplifier. these amplifiers combine very low noise and supply current with a 100mhz gain bandwidth product, a 25v / s slew rate, and are optimized for low supply signal conditioning systems. these amplifiers maintain their performance for supplies from 2.5v to 12.6v and are specified at 3v, 5v and 5v supplies. harmonic distortion is less than C 80dbc at 1mhz making these amplifiers suitable in low power data acquisition systems. the lt6 202 is available in the 5-pin tsot-23 and the 8-pin so, while the lt6203 comes in 8-pin so and msop pack- ages with standard op amp pinouts. for compact layouts the lt6 203 is also available in a tiny fine line leadless package (dfn), while the quad lt6204 is available in the 16-pin ssop and 14-pin so packages. these devices can be used as plug-in replacements for many op amps to improve input/output range and noise performance. low noise 4- to 2-wire local echo cancellation differential receiver fea t ures a pplica t ions n low noise voltage: 1.9nv/ hz (100khz) n low supply current: 3ma/amp max n gain bandwidth product: 100mhz n dual lt6203 in tiny dfn package n low distortion: C80db at 1mhz n low offset voltage: 500 v max n wide supply range: 2.5v to 12.6v n input common mode range includes both rails n output swings rail-to-rail n common mode rejection ratio 90db typ n unity gain stable n low noise current: 1.1pa/hz n output current: 30ma min n operating temperature range C 40c to 85c n low profile (1mm) sot-23 (thinsot ? ) package n low noise, low power signal processing n active filters n rail-to-rail buffer amplifiers n driving a/d converters n dsl receivers n battery powered/battery backed equipment l , lt, ltc, ltm, linear technology and the linear logo are registered trademarks of linear technology corporation. thinsot is a trademark of linear technology corporation. all other trademarks are the property of their respective owners. 1:1 ?? v l 100 line 50 50 1k 1k v r line receiver 2k 1k 1k 2k 6203 ta01a ? + ? + ? + ? + v d line driver 1/2 lt6203 1/2 lt6203 1/2 lt1739 1/2 lt1739 bandwidth (khz) 0 integrated noise (v rms ) 5.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0 40 80 100 6203 ? ta01b 20 60 120 140 160 line receiver integrated noise 25khz to 150khz
lt6202/lt6203/lt6204 2 620234fc p in c on f igura t ion a bsolu t e maxi m u m r a t ings total supply voltage (v + to v C ) .............................. 12. 6v input current (note 2) ......................................... 40ma output short-circuit duration (note 3) ............ in definite operating temperature range (note 4)....C40c to 85c specified temperature range (note 5) .... C 40c to 85c junction temperature ........................................... 15 0c (note 1) lt6202 out 1 v ? 2 top view s5 package 5-lead plastic tsot-23 +in 3 5 v + 4 ?in + ? t jmax = 150c, ja = 250c/w lt6202 1 2 3 4 8 7 6 5 top view nc v + out nc nc ?in +in v ? s8 package 8-lead plastic so + ? t jmax = 150c, ja = 190c/w lt6203 top view dd package 8-lead (3mm 3mm) plastic dfn 5 6 7 8 4 3 2 1out a ?in a +in a v ? v + out b ?in b +in b b a t jmax = 125c, ja = 160c/w underside metal connected to v C lt6203 1 2 3 4 out a ?in a +in a v ? 8 7 6 5 v + out b ?in b +in b top view ms8 package 8-lead plastic msop + ? + ? t jmax = 150c, ja = 250c/w lt6203 top view s8 package 8-lead plastic so 1 2 3 4 8 7 6 5 out a ?in a +in a v ? v + out b ?in b +in b + ? + ? t jmax = 150c, ja = 190c/w lt6204 top view gn package 16-lead narrow plastic ssop 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 out a ?in a +in a v + +in b ?in b out b nc out d ?in d +in d v ? +in c ?in c out c nc + ? + ? + ? + ? a d b c t jmax = 150c, ja = 135c/w lt6204 top view s package 14-lead plastic so 1 2 3 4 5 6 7 14 13 12 11 10 9 8 out a ?in a +in a v + +in b ?in b out b out d ?in d +in d v ? +in c ?in c out c + ? + ? + ? + ? a b c d t jmax = 150c, ja = 150c/w o r d er i n f or m a t ion lead free finish tape and reel part marking* package description specified temperature range lt6202cs5#pbf lt6202cs5#trpbf ltg6 5-lead plastic tsot-23 0c to 70c lt6202is5#pbf lt6202is5#trpbf ltg6 5-lead plastic tsot-23 C40c to 85c lt6202cs8#pbf lt6202cs8#trpbf 6202 8-lead plastic so 0c to 70c lt6202is8#pbf lt6202is8#trpbf 6202i 8-lead plastic so C40c to 85c lt6203cdd#pbf lt6203cdd#trpbf laap 8-lead (3mm 3mm) plastic dfn 0c to 70c lt6203idd#pbf lt6203idd#trpbf laap 8-lead (3mm 3mm) plastic dfn C40c to 85c junction temperature (dd package) ..................... 125 c storage temperature range .................. C 65c to 150c storage temperature range (dd package) ......................................... C 65c to 125c lead temperature (soldering, 10 sec) ................... 3 00c
lt6202/lt6203/lt6204 3 620234fc e lec t rical c harac t eris t ics symbol parameter conditions min typ max units v os input offset voltage v s = 5v, 0v, v cm = half supply lt6203, lt6204, lt6202s8 lt6202 tsot-23 0.1 0.1 0.5 0.7 mv mv v s = 3v, 0v, v cm = half supply lt6203, lt6204, lt6202s8 lt6202 tsot-23 0.6 0.6 1.5 1.7 mv mv v s = 5v, 0v, v cm = v + to v C lt6203, lt6204, lt6202s8 lt6202 tsot-23 0.25 0.25 2.0 2.2 mv mv v s = 3v, 0v, v cm = v + to v C lt6203, lt6204, lt6202s8 lt6202 tsot-23 1.0 1.0 3.5 3.7 mv mv input offset voltage match (channel-to-channel) (note 6) v cm = half supply v cm = v C to v + 0.15 0.3 0.8 1.8 mv mv i b input bias current v cm = half supply v cm = v + v cm = v C C7.0 C8.8 C1.3 1.3 C3.3 2.5 a a a ?i b i b shift v cm = v C to v + 4.7 11.3 a i b match (channel-to-channel) (note 6) 0.1 0.6 a i os input offset current v cm = half supply v cm = v + v cm = v C 0.12 0.07 0.12 1 1 1.1 a a a input noise voltage 0.1hz to 10hz 800 nv p-p e n input noise voltage density f = 100khz, v s = 5v f = 10khz, v s = 5v 2 2.9 4.5 nv/ hz nv/ hz i n input noise current density, balanced input noise current density, unbalanced f = 10khz, v s = 5v 0.75 1.1 pa/hz pa/hz input resistance common mode differential mode 4 12 m k t a = 25c, v s =5v, 0v; v s = 3v, 0v; v cm = v out = half supply, unless otherwise noted. lead free finish tape and reel part marking* package description specified temperature range lt6203cms8#pbf lt6203cms8#trpbf ltb2 8-lead plastic msop 0c to 70c lt6203ims8#pbf lt6203ims8#trpbf ltb3 8-lead plastic msop C40c to 85c lt6203cs8#pbf lt6203cs8#trpbf 6203 8-lead plastic so 0c to 70c lt6203is8#pbf lt6203is8#trpbf 6203i 8-lead plastic so C40c to 85c lt6204cgn#pbf lt6204cgn#trpbf 6204 16-lead narrow plastic ssop 0c to 70c lt6204ign#pbf lt6204ign#trpbf 6204i 16-lead narrow plastic ssop C40c to 85c lt6204cs#pbf lt6204cs#trpbf lt6204cs 14-lead plastic so 0c to 70c lt6204is#pbf lt6204is#trpbf lt6204is 14-lead plastic so C40c to 85c consult ltc marketing for parts specified with wider operating temperature ranges. *the temperature grade is identified by a label on the shipping container. consult ltc marketing for information on non-standard lead based finish parts. for more information on lead free part marking, go to: http://www.linear.com/leadfree/ for more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/ or d er in f or m a t ion
lt6202/lt6203/lt6204 4 620234fc e lec t rical c harac t eris t ics t a = 25c, v s =5v, 0v; v s = 3v, 0v; v cm = v out = half supply, unless otherwise noted. symbol parameter conditions min typ max units c in input capacitance common mode differential mode 1.8 1.5 pf pf a vol large signal gain v s = 5v, v o = 0.5v to 4.5v, r l = 1k to v s /2 v s = 5v, v o = 1v to 4v, r l = 100 to v s /2 v s = 3v, v o = 0.5v to 2.5v, r l = 1k to v s /2 40 8.0 17 70 14 40 v/mv v/mv v/mv cmrr common mode rejection ratio v s = 5v, v cm = v C to v + v s = 5v, v cm = 1.5v to 3.5v v s = 3v, v cm = v C to v + 60 80 56 83 100 80 db db db cmrr match (channel-to-channel) (note 6) v s = 5v, v cm = 1.5v to 3.5v 85 120 db psrr power supply rejection ratio v s = 2.5v to 10v, v cm = 0v 60 74 db psrr match (channel-to-channel) (note 6) v s = 2.5v to 10v, v cm = 0v 70 100 db minimum supply voltage (note 7) 2.5 v v ol output voltage swing low saturation (note 8) no load i sink = 5ma v s = 5v, i sink = 20ma v s = 3v, i sink = 15ma 5 85 240 185 50 190 460 350 mv mv mv mv v oh output voltage swing high saturation (note 8) no load i source = 5ma v s = 5v, i source = 20ma v s = 3v, i source = 15ma 25 90 325 225 75 210 600 410 mv mv mv mv i sc short-circuit current v s = 5v v s = 3v 30 25 45 40 ma ma i s supply current per amp v s = 5v v s = 3v 2.5 2.3 3.0 2.85 ma ma gbw gain bandwidth product frequency = 1mhz, v s = 5v 90 mhz sr slew rate v s = 5v, a v = C1, r l = 1k, v o = 4v 17 24 v/s fpbw full power bandwidth (note 10) v s = 5v, v out = 3v p-p 1.8 2.5 mhz t s settling time 0.1%, v s = 5v, v step = 2v, a v = C1, r l = 1k 85 ns the l denotes the specifications which apply over 0c < t a < 70c temperature range. v s = 5v, 0v; v s = 3v, 0v; v cm = v out = half supply, unless otherwise noted. symbol parameter conditions min typ max units v os input offset voltage v s = 5v, 0v, v cm = half supply lt6203, lt6204, lt6202s8 lt6202 tsot-23 l l 0.2 0.2 0.7 0.9 mv mv v s = 3v, 0v, v cm = half supply lt6203, lt6204, lt6202s8 lt6202 tsot-23 l l 0.6 0.6 1.7 1.9 mv mv v s = 5v, 0v, v cm = v + to v C lt6203, lt6204, lt6202s8 lt6202 tsot-23 l l 0.7 0.7 2.5 2.7 mv mv v s = 3v, 0v, v cm = v + to v C lt6203, lt6204, lt6202s8 lt6202 tsot-23 l l 1.2 1.2 4.0 4.2 mv mv v os tc input offset voltage drift (note 9) v cm = half supply l 3.0 9.0 v/c input offset voltage match (channel-to-channel) (note 6) v cm = half supply v cm = v C to v + l l 0.15 0.5 0.9 2.3 mv mv
lt6202/lt6203/lt6204 5 620234fc e lec t rical c harac t eris t ics the l denotes the specifications which apply over 0c < t a < 70c temperature range. v s = 5v, 0v; v s = 3v, 0v; v cm = v out = half supply, unless otherwise noted. symbol parameter conditions min typ max units i b input bias current v cm = half supply v cm = v + v cm = v C l l l C7.0 C8.8 C1.3 1.3 C3.3 2.5 a a a ?i b i b shift v cm = v C to v + l 4.7 11.3 a i b match (channel-to-channel) (note 6) l 0.1 0.6 a i os input offset current v cm = half supply v cm = v + v cm = v C l l l 0.15 0.10 0.15 1 1 1.1 a a a a vol large signal gain v s = 5v, v o = 0.5v to 4.5v, r l = 1k to v s /2 v s = 5v, v o = 1.5v to 3.5v, r l = 100 to v s /2 v s = 3v, v o = 0.5v to 2.5v, r l = 1k to v s /2 l l l 35 6.0 15 60 12 36 v/mv v/mv v/mv cmrr common mode rejection ratio v s = 5v, v cm = v C to v + v s = 5v, v cm = 1.5v to 3.5v v s = 3v, v cm = v C to v + l l l 60 78 56 83 97 75 db db db cmrr match (channel-to-channel) (note 6) v s = 5v, v cm = 1.5v to 3.5v l 83 100 db psrr power supply rejection ratio v s = 3v to 10v, v cm = 0v l 60 70 db psrr match (channel-to-channel) (note 6) v s = 3v to 10v, v cm = 0v l 70 100 db minimum supply voltage (note 7) l 3.0 v v ol output voltage swing low saturation (note 8) no load i sink = 5ma i sink = 15ma l l l 5.0 95 260 60 200 365 mv mv mv v oh output voltage swing high saturation (note 8) no load i source = 5ma v s = 5v, i source = 20ma v s = 3v, i source = 15ma l l l l 50 115 360 260 100 230 635 430 mv mv mv mv i sc short-circuit current v s = 5v v s = 3v l l 20 20 33 30 ma ma i s supply current per amp v s = 5v v s = 3v l l 3.1 2.75 3.85 3.50 ma ma gbw gain bandwidth product frequency = 1mhz l 87 mhz sr slew rate v s = 5v, a v = C1, r l = 1k, v o = 4v l 15 21 v/s fpbw full power bandwidth (note 10) v s = 5v, v out = 3v p-p l 1.6 2.2 mhz the l denotes the specifcations which apply over C40c < t a < 85c temperature range. v s = 5v, 0v; v s = 3v, 0v; v cm = v out = half supply, unless otherwise noted. (note 5) symbol parameter conditions min typ max units v os input offset voltage v s = 5v, 0v, v cm = half supply lt6203, lt6204, lt6202s8 lt6202 tsot-23 l l 0.2 0.2 0.8 1.0 mv mv v s = 3v, 0v, v cm = half supply lt6203, lt6204, lt6202s8 lt6202 tsot-23 l l 0.6 0.6 2.0 2.2 mv mv v s = 5v, 0v, v cm = v + to v C lt6203, lt6204, lt6202s8 lt6202 tsot-23 l l 1.0 1.0 3.0 3.5 mv mv v s = 3v, 0v, v cm = v + to v C lt6203, lt6204, lt6202s8 lt6202 tsot-23 l l 1.4 1.4 4.5 4.7 mv mv
lt6202/lt6203/lt6204 6 620234fc the l denotes the specifcations which apply over C40c < t a < 85c temperature range. v s = 5v, 0v; v s = 3v, 0v; v cm = v out = half supply, unless otherwise noted. (note 5) e lec t rical c harac t eris t ics symbol parameter conditions min typ max units v os tc input offset voltage drift (note 9) v cm = half supply l 3.0 9.0 v/c input offset voltage match (channel-to-channel) (note 6) v cm = half supply v cm = v C to v + l l 0.3 0.7 1.0 2.5 mv mv i b input bias current v cm = half supply v cm = v + v cm = v C l l l C7.0 C8.8 C1.3 1.3 C3.3 2.5 a a a ?i b i b shift v cm = v C to v + l 4.7 11.3 a i b match (channel-to-channel) (note 6) l 0.1 0.6 a i os input offset current v cm = half supply v cm = v + v cm = v C l l l 0.2 0.2 0.2 1 1.1 1.2 a a a a vol large signal gain v s = 5v, v o = 0.5v to 4.5v, r l = 1k to v s /2 v s = 5v, v o = 1.5v to 3.5v, r l = 100 to v s /2 v s = 3v, v o = 0.5v to 2.5v, r l = 1k to v s /2 l l l 32 4.0 13 60 10 32 v/mv v/mv v/mv cmrr common mode rejection ratio v s = 5v, v cm = v C to v + v s = 5v, v cm = 1.5v to 3.5v v s = 3v, v cm = v C to v + l l l 60 75 56 80 95 75 db db db cmrr match (channel-to-channel) (note 6) v s = 5v, v cm = 1.5v to 3.5v l 80 100 db psrr power supply rejection ratio v s = 3v to 10v, v cm = 0v l 60 70 db psrr match (channel-to-channel) (note 6) v s = 3v to 10v, v cm = 0v l 70 100 db minimum supply voltage (note 7) l 3.0 v v ol output voltage swing low saturation (note 8) no load i sink = 5ma i sink = 15ma l l l 6 95 210 70 210 400 mv mv mv v oh output voltage swing high saturation (note 8) no load i source = 5ma v s = 5v, i source = 15ma v s = 3v, i source = 15ma l l l l 55 125 370 270 110 240 650 650 mv mv mv mv i sc short-circuit current v s = 5v v s = 3v l l 15 15 25 23 ma ma i s supply current per amp v s = 5v v s = 3v l l 3.3 3.0 4.1 3.65 ma ma gbw gain bandwidth product frequency = 1mhz l 83 mhz sr slew rate v s = 5v, a v = C1, r l = 1k, v o = 4v l 12 17 v/s fpbw full power bandwidth (note 10) v s = 5v, v out = 3v p-p l 1.3 1.8 mhz
lt6202/lt6203/lt6204 7 620234fc t a = 25c, v s = 5v; v cm = v out = 0v, unless otherwise noted. e lec t rical c harac t eris t ics symbol parameter conditions min typ max units v os input offset voltage lt6203, lt6204, lt6202s8 v cm = 0v v cm = v + v cm = v C 1.0 2.6 2.3 2.5 5.5 5.0 mv mv mv lt6202 sot-23 v cm = 0v v cm = v + v cm = v C 1.0 2.6 2.3 2.7 6.0 5.5 mv mv mv input offset voltage match (channel-to-channel) (note 6) v cm = 0v v cm = v C to v + 0.2 0.4 1.0 2.0 mv mv i b input bias current v cm = half supply v cm = v + v cm = v C C7.0 C9.5 C1.3 1.3 C3.8 3.0 a a a ?i b i b shift v cm = v C to v + 5.3 12.5 a i b match (channel-to-channel) (note 6) 0.1 0.6 a i os input offset current v cm = half supply v cm = v + v cm = v C 0.15 0.2 0.35 1 1.2 1.3 a a a input noise voltage 0.1hz to 10hz 800 nv p-p e n input noise voltage density f = 100khz f = 10khz 1.9 2.8 4.5 nv/ hz nv/ hz i n input noise current density, balanced input noise current density, unbalanced f = 10khz 0.75 1.1 pa/hz pa/hz input resistance common mode differential mode 4 12 m k c in input capacitance common mode differential mode 1.8 1.5 pf pf a vol large signal gain v o = 4.5v, r l = 1k v o = 2.5v, r l = 100 75 11 130 19 v/mv v/mv cmrr common mode rejection ratio v cm = v C to v + v cm = C2v to 2v 65 85 85 98 db db cmrr match (channel-to-channel) (note 6) v cm = C2v to 2v 85 120 db psrr power supply rejection ratio v s = 1.25v to 5v 60 74 db psrr match (channel-to-channel) (note 6) v s = 1.25v to 5v 70 100 db v ol output voltage swing low saturation (note 8) no load i sink = 5ma i sink = 20ma 5 87 245 50 190 460 mv mv mv v oh output voltage swing high saturation (note 8) no load i source = 5ma i source = 20ma 40 95 320 95 210 600 mv mv mv i sc short-circuit current 30 40 ma i s supply current per amp 2.8 3.5 ma gbw gain bandwidth product frequency = 1mhz 70 100 mhz sr slew rate a v = C1, r l = 1k, v o = 4v 18 25 v/s fpbw full power bandwidth (note 10) v out = 3v p-p 1.9 2.6 mhz t s settling time 0.1%, v step = 2v, a v = C1, r l = 1k 78 ns dg differential gain (note 11) a v = 2, r f = r g = 499, r l = 2k 0.05 % dp differential phase (note 11) a v = 2, r f = r g = 499, r l = 2k 0.03 deg
lt6202/lt6203/lt6204 8 620234fc e lec t rical c harac t eris t ics the l denotes the specifications which apply over 0c < t a < 70c temperature range. v s = 5v; v cm = v out = 0v, unless otherwise noted. symbol parameter conditions min typ max units v os input offset voltage lt6203, lt6204, lt6202s8 v cm = 0v v cm = v + v cm = v C l l l 1.6 3.2 2.8 2.8 6.8 5.8 mv mv mv lt6202 sot-23 v cm = 0v v cm = v + v cm = v C l l l 1.6 3.2 2.8 3.0 7.3 6.3 mv mv mv v os tc input offset voltage drift (note 9) v cm = half supply l 7.5 24 v/c input offset voltage match (channel-to-channel) (note 6) v cm = 0v v cm = v C to v + l l 0.2 0.5 1.0 2.2 mv mv i b input bias current v cm = half supply v cm = v + v cm = v C l l l C7.0 C10 C1.4 1.8 C4.3 3.6 a a a ?i b i b shift v cm = v C to v + l 5.4 13 a i b match (channel-to-channel) (note 6) l 0.15 0.7 a i os input offset current v cm = half supply v cm = v + v cm = v C l l l 0.1 0.2 0.4 1 1.2 1.4 a a a a vol large signal gain v o = 4.5v, r l = 1k v o = 2v, r l = 100 l l 70 10 120 18 v/mv v/mv cmrr common mode rejection ratio v cm = v C to v + v cm = C2v to 2v l l 65 83 84 95 db db cmrr match (channel-to-channel) (note 6) v cm = C2v to 2v l 83 110 db psrr power supply rejection ratio v s = 1.5v to 5v l 60 70 db psrr match (channel-to-channel) (note 6) v s = 1.5v to 5v l 70 100 db v ol output voltage swing low saturation (note 8) no load i sink = 5ma i sink = 15ma l l l 6 95 210 70 200 400 mv mv mv v oh output voltage swing high saturation (note 8) no load i source = 5ma i source = 20ma l l l 65 125 350 120 240 625 mv mv mv i sc short-circuit current l 25 34 ma i s supply current per amp l 3.5 4.3 ma gbw gain bandwidth product frequency = 1mhz l 95 mhz sr slew rate a v = C1, r l = 1k, v o = 4v l 16 22 v/s fpbw full power bandwidth (note 10) v out = 3v p-p l 1.7 2.3 mhz the l denotes the specifications which apply over C40c < t a < 85c temperature range. v s = 5v; v cm = v out = 0v, unless otherwise noted. (note 5) symbol parameter conditions min typ max units v os input offset voltage lt6203, lt6204, lt6202s8 v cm = 0v v cm = v + v cm = v C l l l 1.7 3.8 3.5 3.0 7.5 6.6 mv mv mv lt6202 sot-23 v cm = 0v v cm = v + v cm = v C l l l 1.7 3.8 3.5 3.2 7.7 6.7 mv mv mv
lt6202/lt6203/lt6204 9 620234fc e lec t rical c harac t eris t ics the l denotes the specifications which apply over C40c < t a < 85c temperature range. v s = 5v; v cm = v out = 0v, unless otherwise noted. (note 5) symbol parameter conditions min typ max units v os tc input offset voltage drift (note 9) v cm = half supply l 7.5 24 v/c input offset voltage match (channel-to-channel) (note 6) v cm = 0v v cm = v C to v + l l 0.3 0.6 1.0 2.5 mv mv i b input bias current v cm = half supply v cm = v + v cm = v C l l l C7.0 C10 C1.4 1.8 C4.5 3.6 a a a ?i b i b shift v cm = v C to v + l 5.4 13 a i b match (channel-to-channel) (note 6) l 0.15 0.7 a i os input offset current v cm = half supply v cm = v + v cm = v C l l l 0.15 0.3 0.5 1 1.2 1.6 a a a a vol large signal gain v o = 4.5v, r l = 1k v o = 1.5v r l = 100 l l 60 6.0 110 13 v/mv v/mv cmrr common mode rejection ratio v cm = v C to v + v cm = C2v to 2v l l 65 80 84 95 db db cmrr match (channel-to-channel) (note 6) v cm = C2v to 2v l 80 110 db psrr power supply rejection ratio v s = 1.5v to 5v l 60 70 db psrr match (channel-to-channel) (note 6) v s = 1.5v to 5v l 70 100 db v ol output voltage swing low saturation (note 8) no load i sink = 5ma i sink = 15ma l l l 7 98 260 75 205 500 mv mv mv v oh output voltage swing high saturation (note 8) no load i source = 5ma i source = 15ma l l l 70 130 360 130 250 640 mv mv mv i sc short-circuit current l 15 25 ma i s supply current per amp l 3.8 4.5 ma gbw gain bandwidth product frequency = 1mhz l 90 mhz sr slew rate a v = C1, r l = 1k, v o = 4v l 13 18 v/s fpbw full power bandwidth (note 10) v out = 3v p-p l 1.4 1.9 mhz note 1: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may affect device reliability and lifetime. note 2: inputs are protected by back-to-back diodes and diodes to each supply. if the inputs are taken beyond the supplies or the differential input voltage exceeds 0.7v, the input current must be limited to less than 40ma. note 3: a heat sink may be required to keep the junction temperature below the absolute maximum rating when the output is shorted indefinitely. note 4: the lt6202c/lt6202i, lt6203c/lt6203i and lt6204c/lt6204i are guaranteed functional over the temperature range of C40c and 85c. note 5: the lt6202c/lt6203c/lt6204c are guaranteed to meet specified performance from 0c to 70c. the lt6202c/lt6203c/lt6204c are designed, characterized and expected to meet specified performance from C40c to 85c, but are not tested or qa sampled at these temperatures. the lt6202i/lt6203i/lt6204i are guaranteed to meet specified performance from C40c to 85c. note 6: matching parameters are the difference between the two amplifiers a and d and between b and c of the lt6204; between the two amplifiers of the lt6203. cmrr and psrr match are defined as follows: cmrr and psrr are measured in v/v on the identical amplifiers. the difference is calculated between the matching sides in v/v. the result is converted to db. note 7: minimum supply voltage is guaranteed by power supply rejection ratio test. note 8: output voltage swings are measured between the output and power supply rails. note 9: this parameter is not 100% tested. note 10: full-power bandwidth is calculated from the slew rate: fpbw = sr/2v p note 11: differential gain and phase are measured using a tektronix tsg120yc/ntsc signal generator and a tektronix 1780r video measurement set. the resolution of this equipment is 0.1% and 0.1. ten identical amplifier stages were cascaded giving an effective resolution of 0.01% and 0.01.
lt6202/lt6203/lt6204 10 620234fc typical p er f or m ance c harac t eris t ics input offset voltage (v) ?250 0 number of units 5 15 20 25 50 150 45 lt6202/03/04 g01 10 ?150 ?50 0 250 30 35 40 v s = 5v, 0v s8 input offset voltage (v) ?800 0 number of units 10 30 40 50 ?400 0 200 1000 lt6202/03/04 g02 20 ?600 ?200 400 600 800 60 v s = 5v, 0v s8 input offset voltage (v) ?800 0 number of units 10 20 30 40 ?400 0 400 800 lt6202/03/04 g03 50 60 ?600 ?200 200 600 v s = 5v, 0v s8 total supply voltage (v) 0 6 10 lt6202/03/04 g04 2 4 8 12 14 supply current (ma) t a = 125c t a = 25c t a = ?55c 12 10 8 6 4 2 0 input common mode voltage (v) ?1 offset voltage (mv) 1.0 1.5 2.0 2 4 lt6202/03/04 g05 0.5 0 0 1 3 5 6 ?0.5 ?1.0 v s = 5v, 0v typical part t a = 125c t a = 25c t a = ?55c common mode voltage (v) ?1 ?6 input bias current (a) ?4 ?2 0 2 0 1 2 3 lt6202/03/04 g06 4 5 6 t a = 125c t a = 25c t a = ?55c v s = 5v, 0v temperature (c) ?50 ?5 input bias current (a) ?4 ?2 ?1 0 2 ?20 10 25 85 lt6202/03/04 g07 ?3 3 4 1 ?35 ?5 40 55 70 ?6 v s = 5v, 0v v cm = 5v v cm = 0v load current (ma) 0.01 output saturation voltage (v) 0.1 1 10 0.01 1 10 100 lt6202/03/04 g08 0.001 0.1 t a = 125c t a = 25c v s = 5v, 0v t a = ?55c load current (ma) 0.01 output saturation voltage (v) 0.1 1 10 0.01 1 10 100 lt6202/03/04 g09 0.001 0.1 v s = 5v, 0v t a = 125c t a = 25c t a = ?55c supply current vs supply voltage (both amplifiers) offset voltage vs input common mode voltage input bias current vs common mode voltage input bias current vs temperature output saturation voltage vs load current (output low) output saturation voltage vs load current (output high) v os distribution, v cm = v + /2 v os distribution, v cm = v + v os distribution, v cm = v ?
lt6202/lt6203/lt6204 11 620234fc typical p er f or m ance c harac t eris t ics total supply voltage (v) 1 ?10 change in offset voltage (mv) ?8 ?4 ?2 0 10 4 2 3 3.5 lt6202/03/04 g10 ?6 6 8 2 1.5 2.5 4 4.5 5 t a = 125c t a = ?55c t a = 25c power supply voltage (v) 1.5 output short-circuit current (ma) 60 3 lt6202/03/04 g11 0 ?40 2 2.5 3.5 ?60 ?80 80 40 20 ?20 4 4.5 5 t a = 125c t a = 125c t a = 25c t a = 25c t a = ?55c sourcing sinking t a = ?55c output voltage (v) 0 ?2.5 input voltage (mv) ?1.5 ?0.5 0.5 0.5 1.0 1.5 2.0 lt6202/03/04 g12 2.5 1.5 2.5 ?2.0 ?1.0 0 1.0 2.0 3.0 t a = 25c v s = 3v, 0v r l = 1k r l = 100 output voltage (v) 0 input voltage (mv) 1 2 3 4 lt6202/03/04 g13 5 ?2.5 ?1.5 ?0.5 0.5 1.5 2.5 ?2.0 ?1.0 0 1.0 2.0 t a = 25c v s = 5v, 0v r l = 1k r l = 100 output voltage (v) ?5 input voltage (mv) 3 lt6202/03/04 g14 ?3?4 ?1?2 1 2 4 0 5 ?2.5 ?1.5 ?0.5 0.5 1.5 2.5 ?2.0 ?1.0 0 1.0 2.0 t a = 25c v s = 5v r l = 1k r l = 100 output current (ma) ?80 ?15 offset voltage (mv) ?10 ?5 0 5 ?40 0 40 80 lt6202/03/04 g15 10 15 ?60 ?20 20 60 v s = 5v t a = 25c t a = ?55c t a = 125c time after power-up (s) 0 change in offset voltage (v) 80 120 160 lt6202/03/04 g16 40 0 40 80 120 20 60 100 140 160 60 100 20 140 t a = 25c v s = 5v v s = 2.5v v s = 1.5v total source resistance () 1 total noise voltage (nv/ hz) 10 10 1k 10k 100k lt6202/03/04 g17 0.1 100 100 v s = 2.5v v cm = 0v f = 100khz total spot noise amplifier spot noise voltage resistor spot noise frequency (hz) 10 0 noise voltage (nv hz) 5 15 20 25 1k 45 lt6202/03/04 g18 10 100 100k 30 35 40 10k t a = 25c v s = 5v, 0v npn active v cm = 4.5v both active v cm = 2.5v pnp active v cm = 0.5v open-loop gain open-loop gain offset voltage vs output current warm-up drift vs time (lt6203s8) total noise vs total source resistance input noise voltage vs frequency minimum supply voltage output short-circuit current vs power supply voltage open-loop gain
lt6202/lt6203/lt6204 12 620234fc typical p er f or m ance c harac t eris t ics frequency (hz) balanced noise current (pa/hz) 7 6 5 4 3 2 1 0 10 1k 10k 100k lt6202/03/04 g19 100 balanced source resistance v s = 5v, 0v t a = 25c pnp active v cm = 0.5v npn active v cm = 4.5v both active v cm = 2.5v frequency (hz) 4 unbalanced noise current (pa/hz) 8 12 2 6 10 10 1k 10k 100k lt6202/03/04 g19.1 0 100 unbalanced source resistance v s = 5v, 0v t a = 25c pnp active v cm = 0.5v both active v cm = 2.5v npn active v cm = 4.5v time (2s/div) output voltage (nv) 1200 1000 800 400 0 ?400 ?800 ?1000 ? 1200 lt6202/03/04 g20 v s = 5v, 0v v cm = v s /2 temperature (c) ?55 40 gain bandwith (mhz) 60 100 120 50 lt6202/03/04 g21 80 0 ?25 75 100 25 125 v s = 3v, 0v v s = 3v, 0v v s = 5v v s = 5v phase margin (deg) phase margin gain bandwidth 90 80 70 60 frequency (hz) gain (db) 80 70 60 50 40 30 20 10 0 ?10 ?20 120 100 80 60 40 20 0 ?20 ?40 ?60 ?80 100k 10m 100m 1g lt6202/03/04 g22 1m phase (deg) phase gain v s = 3v, 0v v s = 3v, 0v v s = 5v v s = 5v c l = 5pf r l = 1k v cm = 0v frequency (hz) gain (db) 80 70 60 50 40 30 20 10 0 ?10 ?20 120 100 80 60 40 20 0 ?20 ?40 ?60 ?80 100k 10m 100m 1g lt6202/03/04 g23 1m phase (deg) phase gain v s = 5v, 0v c l = 5pf r l = 1k v cm = 0.5v v cm = 0.5v v cm = 4.5v v cm = 4.5v total supply voltage (v) 0 gain bandwith (mhz) 6 lt6202/03/04 g24 120 80 2 4 8 60 40 100 10 12 14 phase margin (deg) phase margin gain bandwidth 90 80 70 60 50 t a = 25c r l = 1k c l = 5pf temperature (c) ?55 40 50 70 25 75 lt6202/03/04 g25 30 20 ?25 0 50 100 125 10 0 60 slew rate (v/s) v s = 5v v s = 2.5v rising falling a v = ?1 r f = r g = 1k r l = 1k v s = 5v v s = 2.5v frequency (hz) 1 output impedance () 10 100k 10m 100m lt6202/03/04 g26 0.1 1m 0.01 100 1000 v s = 5v, 0v a v = 1 a v = 2 a v = 10 gain bandwidth and phase margin vs temperature open-loop gain vs frequency open-loop gain vs frequency gain bandwidth and phase margin vs supply voltage slew rate vs temperature output impedance vs frequency balanced noise current vs frequency unbalanced noise current vs frequency 0.1hz to 10hz output voltage noise
lt6202/lt6203/lt6204 13 620234fc typical p er f or m ance c harac t eris t ics frequency (hz) common mode rejection ratio (db) 120 100 80 60 40 20 0 10k 1m 10m 1g lt6202/03/04 g27 100k 100m v s = 5v, 0v v cm = v s /2 frequency (mhz) 0.1 ?80 voltage gain (db) ?60 ?40 1 10 100 lt6202/03/04 g27.1 ?100 ?90 ?70 ?50 ?110 ?120 t a = 25c a v = 1 v s = 5v frequency (hz) 20 common mode rejection ratio (db) 30 50 70 80 1k 100k 1m 100m lt6202/03/04 g28 10 10k 10m 60 40 0 positive supply negative supply v s = 5v, 0v t a = 25c v cm = v s /2 capacitive load (pf) 10 overshoot (%) 40 35 30 25 20 15 10 5 0 100 1000 lt6202/03/04 g29 r s = 10 r s = 20 r s = 50 r l = 50 v s = 5v, 0v a v = 1 capacitive load (pf) 10 overshoot (%) 40 35 30 25 20 15 10 5 0 100 1000 lt6202/03/04 g30 r s = 10 r s = 20 r s = 50 r l = 50 v s = 5v, 0v a v = 2 output step (v) ?4 0 settling time (ns) 50 100 150 200 ?3 ?2 ?1 0 lt6202/03/04 g31 1 2 3 4 1mv 1mv 10mv 10mv v s = 5v a v = 1 t a = 25c ? + v in v out 500 output step (v) ?4 0 settling time (ns) 50 100 150 200 ?3 ?2 ?1 0 lt6202/03/04 g32 1 2 3 4 1mv 1mv 10mv 10mv v s = 5v a v = ?1 t a = 25c ? + v in v out 500 500 frequency (hz) 10k 6 output voltage swing (v p-p ) 8 10 100k 1m 10m lt6202/03/04 g33 4 5 7 9 3 2 a v = ?1 a v = 2 v s = 5v t a = 25c hd 2 , hd 3 < ?40dbc frequency (hz) 10k ?100 distortion (dbc) ?60 ?50 ?40 100k 1m 10m lt6202/03/04 g34 ?70 ?80 ?90 a v = 1 v s = 2.5v v out = 2v (p-p) r l = 1k, 3rd r l = 1k, 2nd r l = 100, 3rd r l = 100, 2nd series output resistor vs capacitive load series output resistor vs capacitive load settling time vs output step (noninverting) settling time vs output step (inverting) maximum undistorted output signal vs frequency distortion vs frequency common mode rejection ratio vs frequency channel separation vs frequency power supply rejection ratio vs frequency
lt6202/lt6203/lt6204 14 620234fc typical p er f or m ance c harac t eris t ics frequency (hz) 10k ?100 distortion (dbc) ?60 ?50 ?40 100k 1m 10m lt6202/03/04 g35 ?70 ?80 ?90 a v = 1 v s = 5v v out = 2v (p-p) r l = 100, 3rd r l = 100, 2nd r l = 1k, 3rd r l = 1k, 2nd frequency (hz) 10k ?100 distortion (dbc) ?60 ?50 ?40 100k 1m 10m lt6202/03/04 g36 ?70 ?80 ?90 a v = 2 v s = 2.5v v out = 2v (p-p) r l = 100, 3rd r l = 100, 2nd r l = 1k, 3rd ?30 r l = 1k, 2nd frequency (hz) 10k ?100 distortion (dbc) ?60 ?50 ?40 100k 1m 10m lt6202/03/04 g37 ?70 ?80 ?90 a v = 2 v s = 5v v out = 2v (p-p) r l = 100, 3rd r l = 100, 2nd r l = 1k, 3rd r l = 1k, 2nd 200ns/div 1v/div 0v 5v v s = 5v, 0v a v = 1 r l = 1k lt6202/03/04 g38 200ns/div 50mv/div 0v v s = 5v, 0v a v = 1 r l = 1k lt6202/03/04 g39 200ns/div 2v/div 0v 5v ?5v v s = 5v a v = 1 r l = 1k lt6202/03/04 g40 200ns/div v in (1v/div) 0v 0v v s = 5v, 0v a v = 2 lt6202/03/04 g41 v out (2v/div) 5v large-signal response 5v small-signal response 5v large-signal response output-overdrive recovery distortion vs frequency distortion vs frequency distortion vs frequency
lt6202/lt6203/lt6204 15 620234fc amplifier characteristics figure 1 shows a simplified schematic of the lt6202/ lt6203/lt6204, which has two input differential ampli- fiers in parallel that are biased on simultaneously when the common mode voltage is at least 1.5v from either rail. this topology allows the input stage to swing from the positive supply voltage to the negative supply voltage. as the common mode voltage swings beyond v cc C 1.5v, current source i 1 saturates and current in q1/q4 is zero. feedback is maintained through the q2/q3 differential amplifier, but with an input g m reduction of 1/2. a similar effect occurs with i 2 when the common mode voltage swings within 1.5v of the negative rail. the effect of the g m reduction is a shift in the v os as i 1 or i 2 saturate. a pplica t ions i n f or m a t ion input bias current normally flows out of the + and C inputs. the magnitude of this current increases when the input common mode voltage is within 1.5v of the negative rail, and only q1/q4 are active. the polarity of this current reverses when the input common mode voltage is within 1.5v of the positive rail and only q2/q3 are active. the second stage is a folded cascode and current mir - ror that converts the input stage differential signals to a single ended output. capacitor c1 reduces the unity cross frequency and improves the frequency stability with- out degrading the gain bandwidth of the amplifier. the differential drive generator supplies current to the output transistors that swing from rail-to-rail. differential drive generator + ? r1 r2 r3 r4 r5 q2 q3 q5 q6 q9 q8 q7 q10 q11 q1 q4 i 1 i 2 d3 d2 d1 desd2 desd4 desd3 desd1 desd5 desd6 + ? v bias c m c1 +v +v +v +v ?v ?v ?v v + v ? 6203/04 f01 figure 1. simplified schematic
lt6202/lt6203/lt6204 16 620234fc a pplica t ions i n f or m a t ion input protection there are back-to-back diodes, d1 and d2, across the + and C inputs of these amplifiers to limit the differential input voltage to 0.7v. the inputs of the lt6202/lt6203/ lt6 304 do not have internal resistors in series with the input transistors. this technique is often used to protect the input devices from over voltage that causes excessive currents to flow. the addition of these resistors would significantly degrade the low noise voltage of these ampli- fiers. for instance, a 100 resistor in series with each input would generate 1.8nv/ hz of noise, and the total amplifier noise voltage would rise from 1.9nv/ hz to 2.6nv/hz. once the input differential voltage exceeds 0.7v, steady state current conducted though the protection diodes should be limited to 40ma. this implies 25 of protec- tion resistance per volt of continuous overdrive beyond 0.7v. the input diodes are rugged enough to handle transient currents due to amplifier slew rate overdrive or momentary clipping without these resistors. figure 2 shows the input and output waveforms of the amplifier driven into clipping while connected in a gain of a v = 1. when the input signal goes sufficiently beyond the power supply rails, the input transistors will saturate. when saturation occurs, the amplifier loses a stage of phase inversion and the output tries to change states. diodes d1 and d2 forward bias and hold the output within ov figure 2. v s = 2.5v, a v = 1 with large overdrive a diode drop of the input signal. in this photo, the input signal generator is clipping at 35ma, and the output transistors supply this generator current through the protection diodes. with the amplifier connected in a gain of a v 2, the output can invert with very heavy input overdrive. to avoid this inversion, limit the input overdrive to 0.5v beyond the power supply rails. esd the lt6202/lt6203/lt6 204 have reverse-biased esd protection diodes on all inputs and outputs as shown in figure 1. if these pins are forced beyond either supply, unlimited current will flow through these diodes. if the current is transient and limited to one hundred milliamps or less, no damage to the device will occur. noise the noise voltage of the lt6202/lt6203/lt6204 is equiva - lent to that of a 225 resistor, and for the lowest possible noise it is desirable to keep the source and feedback re - sistance at or below this value, i.e. r s + r g || r fb 22 5. with r s + r g || r fb = 225 the total noise of the amplifier is: e n = (1.9nv) 2 +(1.9nv) 2 = 2.7nv. below this resis - tance value, the amplifier dominates the noise, but in the resistance region between 225 and approximately 10k, the noise is dominated by the resistor thermal noise. as the total resistance is further increased, beyond 10k, the noise current multiplied by the total resistance eventually dominates the noise. the product of e n ? i supply is an interesting way to gauge low noise amplifiers. many low noise amplifiers with low e n have high i supply current. in applications that require low noise with the lowest possible supply current, this product can prove to be enlightening. the lt6202/lt6203/lt6204 have an e n , i supply product of 3.2 per amplifier, yet it is common to see amplifiers with similar noise specifications have an e n ? i supply product of 4.7 to 13.5. for a complete discussion of amplifier noise, see the lt1028 data sheet.
lt6202/lt6203/lt6204 17 620234fc typical a pplica t ions low noise, low power 1m ac photodiode transimpedance amplifier figure 3 shows the lt6202 applied as a transimpedance amplifier (tia). the lt6 202 forces the bf862 ultralow-noise jfet source to 0v, with r3 ensuring that the jfet has an i drain of 1ma. the jfet acts as a source follower, buffering the input of the lt6202 and making it suitable for the high impedance feedback elements r1 and r2. the bf862 has a minimum i dss of 10ma and a pinchoff voltage between C0.3v and C1.2v. the jfet gate and the lt6202 output therefore sit at a point slightly higher than one pinchoff voltage below ground (typically about C0.6v). when the photodiode is illuminated, the current must come from the lt6202s output through r1 and r2, as in a normal tia. amplifier input noise density and gain-bandwidth product were measured at 2.4nv/hz and 100mhz, respectively. note that because the jfet has a high g m , approximately 1/80, its attenuation looking into r3 is only about 2%. gain-bandwidth product was measured at 100mhz and the closed-loop bandwidth using a 3pf photodiode was approximately 1.4mhz. precision low noise, low power, 1m photodiode transimpedance amplifier figure 4 shows the lt6 202 applied as a transimpedance amplifier (tia), very similar to that shown in figure 3. in this case, however, the jfet is not allowed to dictate the dc-bias conditions. rather than being grounded, the lt6 202s noninverting input is driven by the ltc2050 to the exact state necessary for zero jfet gate voltage. the noise performance is nearly identical to that of the circuit in figure 3, with the additional benefit of excellent dc performance. input offset was measured at under 200v and output noise was within 2mv p-p over a 20mhz bandwidth. ? + v bias ? philips bf862 r1 499k r2 499k c1 1pf v s ? v s + v out v s = 5v lt6202 r3 4.99k lt6202/03/04 f03 figure 3. low noise, low power 1m ac photodiode transimpedance amplifer ? + v bias ? philips bf862 r1 499k r2 499k c1 1pf v s ? v s + v out v s = 5v r3 4.99k c2 0.1f ltc2050hv r4 10m r5 10k c3 1f lt6202/03/04 f04 ? + lt6202 figure 4. precision low noise, low power transimpedance amplifer
lt6202/lt6203/lt6204 18 620234fc typical a pplica t ions single-supply 16-bit adc driver figure 5 shows the lt6203 driving an ltc1864 unipolar 16-bit a/d converter. the bottom half of the lt6203 is in a gain-of-one configuration and buffers the 0v nega - tive full-scale signal v low into the negative input of the ltc1864. the top half of the lt6203 is in a gain-of-ten configuration referenced to the buffered voltage v low and drives the positive input of the ltc1864. the input range of the ltc1 864 is 0v to 5v, but for best results the input range of v in should be from v low (about 0.4v) to about 0.82v. figure 6 shows an fft obtained with a 10.1318khz coherent input waveform, from 8192 samples with no windowing or averaging. spurious free dynamic range is seen to be about 100db. although the ltc1864 has a sample rate far below the gain bandwidth of the lt6203, using this amplifier is not necessarily a case of overkill. the designer is reminded that a/d converters have sample apertures that are vanishingly small (ideally, infinitesimally small) and make demands on the upstream circuitry far in excess of what is implied by the innocent-looking sample rate. in addition, when an a/d converter takes a sample, it applies a small capacitor to its inputs with a fair amount of glitch energy and expects the voltage on the capacitor to settle to the true value very quickly. finally, the ltc1864 has a 20mhz analog input bandwidth and can be used in undersampling applications, again requiring a source bandwidth higher than nyquist. ? + ? + ? + ltc1864 16-bit 250ksps 5v serial data out c1 470pf r3 100 r4 100 r1 1k r2 110 v in = 0.6v dc 200mv ac v low = 0.4v dc 1/2 lt6203 1/2 lt6203 lt6202/03/04 f05 figure 5. single-supply 16-bit adc driver frequency (khz) 0 sfdr (db) 0 ?10 ?20 ?30 ?40 ?50 ?60 ?70 ?80 ?90 ?100 ?110 ?120 ?130 ?140 ?150 37.5 62.5 100 lt6202/03/04 f06 12.5 25 50 75 82.5 112.5 125 f s = 250ksps f in = 10.131836khz figure 6. fft showing 100db sfdr
lt6202/lt6203/lt6204 19 620234fc dd package 8-lead plastic dfn (3mm 3mm) (reference ltc dwg # 05-08-1698 rev c) 3.00 0.10 (4 sides) note: 1. drawing to be made a jedec package outline m0-229 variation of (weed-1) 2. drawing not to scale 3. all dimensions are in millimeters 4. dimensions of exposed pad on bottom of package do not include mold flash. mold flash, if present, shall not exceed 0.15mm on any side 5. exposed pad shall be solder plated 6. shaded area is only a reference for pin 1 location on top and bottom of package 0.40 0.10 bottom view?exposed pad 1.65 0.10 (2 sides) 0.75 0.05 r = 0.125 typ 2.38 0.10 1 4 8 5 pin 1 top mark (note 6) 0.200 ref 0.00 ? 0.05 (dd8) dfn 0509 rev c 0.25 0.05 2.38 0.05 recommended solder pad pitch and dimensions apply solder mask to areas that are not soldered 1.65 0.05 (2 sides) 2.10 0.05 0.50 bsc 0.70 0.05 3.5 0.05 package outline 0.25 0.05 0.50 bsc p ackage descrip t ion
lt6202/lt6203/lt6204 20 620234fc p ackage descrip t ion gn package 16-lead plastic ssop (narrow .150 inch) (reference ltc dwg # 05-08-1641) gn16 (ssop) 0204 1 2 3 4 5 6 7 8 .229 ? .244 (5.817 ? 6.198) .150 ? .157** (3.810 ? 3.988) 16 15 14 13 .189 ? .196* (4.801 ? 4.978) 12 11 10 9 .016 ? .050 (0.406 ? 1.270) .015 .004 (0.38 0.10) 45 0 ? 8 typ .007 ? .0098 (0.178 ? 0.249) .0532 ? .0688 (1.35 ? 1.75) .008 ? .012 (0.203 ? 0.305) typ .004 ? .0098 (0.102 ? 0.249) .0250 (0.635) bsc .009 (0.229) ref .254 min recommended solder pad layout .150 ? .165 .0250 bsc .0165 .0015 .045 .005 * dimension does not include mold flash. mold flash shall not exceed 0.006" (0.152mm) per side ** dimension does not include interlead flash. interlead flash shall not exceed 0.010" (0.254mm) per side inches (millimeters) note: 1. controlling dimension: inches 2. dimensions are in 3. drawing not to scale
lt6202/lt6203/lt6204 21 620234fc ms8 package 8-lead plastic msop (reference ltc dwg # 05-08-1660 rev f) p ackage descrip t ion msop (ms8) 0307 rev f 0.53 0.152 (.021 .006) seating plane note: 1. dimensions in millimeter/(inch) 2. drawing not to scale 3. dimension does not include mold flash, protrusions or gate burrs. mold flash, protrusions or gate burrs shall not exceed 0.152mm (.006") per side 4. dimension does not include interlead flash or protrusions. interlead flash or protrusions shall not exceed 0.152mm (.006") per side 5. lead coplanarity (bottom of leads after forming) shall be 0.102mm (.004") max 0.18 (.007) 0.254 (.010) 1.10 (.043) max 0.22 ? 0.38 (.009 ? .015) typ 0.1016 0.0508 (.004 .002) 0.86 (.034) ref 0.65 (.0256) bsc 0 ? 6 typ detail ?a? detail ?a? gauge plane 1 2 3 4 4.90 0.152 (.193 .006) 8 7 6 5 3.00 0.102 (.118 .004) (note 3) 3.00 0.102 (.118 .004) (note 4) 0.52 (.0205) ref 5.23 (.206) min 3.20 ? 3.45 (.126 ? .136) 0.889 0.127 (.035 .005) recommended solder pad layout 0.42 0.038 (.0165 .0015) typ 0.65 (.0256) bsc
lt6202/lt6203/lt6204 22 620234fc s8 package 8-lead plastic small outline (narrow .150 inch) (reference ltc dwg # 05-08-1610) p ackage descrip t ion .016 ? .050 (0.406 ? 1.270) .010 ? .020 (0.254 ? 0.508) 45 0? 8 typ .008 ? .010 (0.203 ? 0.254) so8 0303 .053 ? .069 (1.346 ? 1.752) .014 ? .019 (0.355 ? 0.483) typ .004 ? .010 (0.101 ? 0.254) .050 (1.270) bsc 1 2 3 4 .150 ? .157 (3.810 ? 3.988) note 3 8 7 6 5 .189 ? .197 (4.801 ? 5.004) note 3 .228 ? .244 (5.791 ? 6.197) .245 min .160 .005 recommended solder pad layout .045 .005 .050 bsc .030 .005 typ inches (millimeters) note: 1. dimensions in 2. drawing not to scale 3. these dimensions do not include mold flash or protrusions. mold flash or protrusions shall not exceed .006" (0.15mm)
lt6202/lt6203/lt6204 23 620234fc s package 14-lead plastic small outline (narrow .150 inch) (reference ltc dwg # 05-08-1610) p ackage descrip t ion 1 n 2 3 4 .150 ? .157 (3.810 ? 3.988) note 3 14 13 .337 ? .344 (8.560 ? 8.738) note 3 .228 ? .244 (5.791 ? 6.197) 12 11 10 9 5 6 7 n/2 8 .016 ? .050 (0.406 ? 1.270) .010 ? .020 (0.254 ? 0.508) 45 0 ? 8 typ .008 ? .010 (0.203 ? 0.254) s14 0502 .053 ? .069 (1.346 ? 1.752) .014 ? .019 (0.355 ? 0.483) typ .004 ? .010 (0.101 ? 0.254) .050 (1.270) bsc .245 min n 1 2 3 n/2 .160 .005 recommended solder pad layout .045 .005 .050 bsc .030 .005 typ inches (millimeters) note: 1. dimensions in 2. drawing not to scale 3. these dimensions do not include mold flash or protrusions. mold flash or protrusions shall not exceed .006" (0.15mm)
lt6202/lt6203/lt6204 24 620234fc p ackage descrip t ion s5 package 5-lead plastic tsot-23 (reference ltc dwg # 05-08-1635) 1.50 ? 1.75 (note 4) 2.80 bsc 0.30 ? 0.45 typ 5 plcs (note 3) datum ?a? 0.09 ? 0.20 (note 3) s5 tsot-23 0302 rev b pin one 2.90 bsc (note 4) 0.95 bsc 1.90 bsc 0.80 ? 0.90 1.00 max 0.01 ? 0.10 0.20 bsc 0.30 ? 0.50 ref note: 1. dimensions are in millimeters 2. drawing not to scale 3. dimensions are inclusive of plating 4. dimensions are exclusive of mold flash and metal burr 5. mold flash shall not exceed 0.254mm 6. jedec package reference is mo-193 3.85 max 0.62 max 0.95 ref recommended solder pad layout per ipc calculator 1.4 min 2.62 ref 1.22 ref
lt6202/lt6203/lt6204 25 620234fc information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no representa - tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. r evision h is t ory rev date description page number c 5/11 revised units to m for input resistance common mode 3 (revision history begins at rev c)
lt6202/lt6203/lt6204 26 620234fc linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax : (408) 434-0507 www.linear.com linear technology corporation 2009 lt 0511 rev c ? printed in usa r ela t e d p ar t s typical a pplica t ion part number description comments lt1028 single, ultralow noise 50mhz op amp 1.1nv/ hz lt1677 single, low noise rail-to-rail amplifier 3v operation, 2.5ma, 4.5nv/ hz , 60v max v 0s lt1722/lt1723/lt1724 single/dual/quad low noise precision op amps 70v/s slew rate, 400v max v os , 3.8nv/ hz, 3.7ma lt1800/lt1801/lt1802 single/dual/quad low power 80mhz rail-to-rail op amps 8.5nv/ hz, 2ma max supply lt1806/lt1807 single/dual, low noise 325mhz rail-to-rail amplifiers 2.5v operation, 550v max v os , 3.5nv/ hz lt6200 single ultralow noise rail-to-rail amplifier 0.95nv/ hz, 165mhz gain bandwidth low noise differential amplifer with gain adjust and common mode control ? + ? + r1 402 r2 200 r3 100 r4 402 r5 200 r6 100 0db 6db 12db 0db 6db 12db 1/2 lt6203 1/2 lt6203 c1 270pf r7, 402 r9 402 r a r b v + 0.1f r8 402 c2 22pf v + c3 5pf r10, 402 v out + v out ? v in ? v in + lt6202/03/04 f07 r b r a + r b output v cm = v + ( ) frequency (hz) 50k relative differential gain (1db/div) 1m 5m lt6202/03/04 f08 g = 6db g = 12db g = 0db low noise differential amplifer frequency response

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